Texas Instruments (TI) is out front and ready for the next big challenge. Our innovations are at the core of nearly every electronics product in use today. And it doesn’t stop there. We’re developing breakthrough technology to power the world’s future innovations as well. TI is committed to building a better future — from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities. Put your talent to work with us.
• Develop, deliver and support Cadence-based design kits in mixed-signal process technologies.
• Create and maintain technology files, parameterized cells (pcells) and other kit elements.
• Create component symbols and implement component sub-circuits in sync with SPICE models and model nomenclature.
• Create/support CDF (component description format) files.
• Develop and implement p-cell layouts based on pre-existing pcell templates for synthesis of device layouts.
• Contribute to the development of process technology and documentation that supports the worldwide use of our process technologies.
• Communicate upcoming changes to mixed-signal designers using these design kits to better help and streamline their transition to the new version.
• Contribute to the development and improvement of PDK and EDA environment standards.
• Support, adapt and improve existing physical layout verification, schematic verification and parasitic extraction tools.
• Work closely with process development engineers to implement process design rules into physical verification rules decks and to generate parasitic capacitance, resistance and inductance information for parasitic extraction flows.
• Run proper quality control to make sure the physical verification decks are aligned with the process design rules.
The ideal candidate will have at least 3 years of experience using the Cadence design environment. Experience in design kit creation is highly valued. Configuration management software experience with tools like Clearcase, DesignSync is desired.
Familiarity with CMOS and/or BiCMOS process/fabrication technologies is required. Good understanding of analog and mixed signal circuit design and device physics and mixed-signal software tools like Cadence to do schematic capture, analog simulation (hspice, spectre or Eldo), layout, physical verification (Hercules, Chameleon, Calibre or Assura) and parasitic extraction (Assura RCX, Synopsys StarRC or equivalent) are needed.
Knowledge of physical verification tools like K2 Chameleon, Assura, Hercules or Caliber is required. Basic knowledge of UNIX is also required. PERL or C knowledge is expected. Good communication skills are a must.
Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment.